Nonvolatile memory cells are advantageous since they retain recorded information even when the power to the memory is turned off. There are several different types of non-volatile memories, including electrically programmable read only memories (EPROMs), electrically eraseable and programmable read only memories (EEPROMS) and flash EEPROM memories. EPROMs are electrically programmable, usually by channel hot electron injection into a floating gate, but are erasable through UV light exposure. Conventional EEPROMs have the same programming functionality, but instead of being light erasable they can be both erased and programmed electrically, for example, by electron tunneling into or out of the trapping media. Thus, information may be stored in these memories, retained when the power is off, and the memories may be erased for reprogramming, as necessary, using appropriate techniques. Flash EEPROMs have the same or similar read and programming functionality as EEPROMs. However, in contrast to EEPROMs where single bits, single bytes, or small amount of bytes may be selectively erased, in Flash EEPROMs, the erase is performed on a large number of bytes, typically referred to as a “sector” or a “block”. As an example, an erase sector in a Flash EEPROM may be 1K Bytes, or 1 M Bytes, or some other large number of Bytes. Thus, EEPROMS differ from Flash EEPROMs in the erase granularity.
In order to achieve the erase granularity, select transistors are used to isolate the bits to be erased from the other bits in the memory array. In Flash EEPROMs, this means that select transistors are required per each erase sector, i.e. per a large number of bits. On the other hand, in EEPROM devices, many more select transitors are required due to the finer erase granularity. As an example, for a true byte EEPROM device, one select transistor per cell may be required. Thus, for the same number of bits in an array, a Flash EEPROM array will usually be much smaller than a respective EEPROM array due to the much smaller overhead of select transistors. This makes Flash EEPROM devices more cost effective since the array area directly affects the total die size. Furthermore, the yield is also positively affected.
Nonvolatile memory cells differ in certain aspects from the transistors, typically called logic devices, that are generally utilized in electronic components, such as microcontrollers, that work with the memory cells. Logic devices are formed of transistors that use a single gate electrode while nonvolatile memories usually include two gate electrodes, known as the control and the floating gate electrodes, situated one over the other. Furthermore, the doping profiles of the source and drain junctions, and sometimes even the local substrate doping profile of logic and non-volatile memory transistors, differ. Because of these structural differences, nonvolatile memories and logic devices may be manufactured by some common and some different process steps. In addition, the non-volatile memory transistors used in Flash EEPROM and in EEPROM devices may differ as well, and in each case, the non-volatile cell structure is optimized for the specific application (Flash EEPROM vs. EEPROM) and the specific program and erase mechanisms being used. All these facts may contribute to a substantial increase in process complexity and manufacturing cost when integrating logic devices and non-volatile memory devices of one or more types onto the same die.
Conventionally, three approaches have been utilized to integrate FLASH and EEPROM onto a single integrated circuit die. One technique is to build both the EEPROM and FLASH devices using appropriate process technologies to create the two different types of devices on the same die. However, this results in a dramatic increase in the number of process steps involved and therefore greatly increases the cost of the resulting device. Therefore, such techniques have not met with considerable acceptance in the industry.
Alternatively, a basic FLASH memory may be created and an additional FLASH portion may be adapted to emulate EEPROM memory. The software may be stored in a boot block which may also be a FLASH memory. Thus, the system needs a first FLASH memory to act as FLASH, a second FLASH memory to store the software needed to emulate EEPROM operation and additional FLASH memory to actually implement the FLASH-like capabilities. This results in a very costly structure whose operation is complicated. Thus, this technique has also not met with considerable administrative acceptance.
The third technique is to use an EEPROM memory to emulate a FLASH memory. However, EEPROM memories are generally large and therefore tend to be much more expensive. In fact, EEPROM memories may be three to four times larger than FLASH memories. Therefore, this approach is generally not considered to be commercially viable and has similarly failed to meet with considerable commercial acceptance.
Exemplary combination flash and EEPROM devices are described in U.S. Pat. Nos. 6,252,799, 6,074,916 and 6,326,265.